Performance Portability in the Exascale Era
Programming Models & Languages
TimeTuesday, June 18th11am - 11:30am
DescriptionMultiple different computer architectures are expected to be required to reach the Exascale era. From GPUs to many-core CPUs using heavy weight or light weight cores, this diversity of architectures will create a huge challenge for scientific software developers: how can we write applications which will run efficiently across all these systems? In this talk we will investigate performance portability in the Exascale era, presenting some results from a wide-scale study of performance portability. We will also examine the performance portability implications of architecture classes such as GPUs and many-core CPUs, as well as the effect that the choice of parallel programming language may have.
Head of the High Performance Computing Research Group, and Professor of HPC