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ARM for HPC: A New Era for Co-Design Opportunities
Event Type
Birds of a Feather
Passes
Tags
Computer Architecture
Exascale Systems
HPC Centre Planning and Operations
Programming Models & Languages
System Software & Runtime Systems
TimeWednesday, June 19th1:45pm - 2:45pm CEST
LocationAnalog 1, 2
DescriptionIn recent years, systems based on the ARM architecture have gained traction in the HPC community as evidenced by several ARM-based projects including the Japanese Post-K Computer, Sandia’s Astra system, UK’s GW4/EPSRC efforts and Europe’s “Mont-Blanc” project. ARM is now a major player in the HPC field, by introducing new technologies for HPC workloads like ARMv8-A Scalable Vector Extension (SVE) technology and related compilers and scientific libraries. To complement this increase in ARMv8 HPC systems, we want to discuss what co-design opportunities ARM brings to the table for end-users both in the context of hardware design space exploration as well as with software/hardware co-design. In this BoF we will discuss/identify the key technologies that the HPC user community can help to co-design to have an impact on future ARM HPC systems. For example, what opportunities do we have to co-design ARM/interconnect support with low-level communication APIs (e.g. UCX, etc), how can SVE be used and extended, and how should new 3D stacked memories be used with future ARM memory subsystem? This BoF will discuss these areas and also explore user tools like emulators and simulators to explore such software and hardware co-design. We will focus on user-experiences with existing co-design tools and also feature an interactive section of the BoF to get feedback on community needs and to define proposed new applications which might be enabled by new HW, SW, and network designs or tools.
BoF Organizer/Speakers